In the prior art, A Margomenos, et al describe in U.S. Pat. No. 8,617,927, issued Dec. 31, 2013, a surface mount package for GaN devices with embedded heat spreaders. A. Margomenos, et al also describe packaging, methods in “Novel Packaging, Cooling and Interconnection Method for GaN High Performance Power Amplifiers and GaN based RF Front-Ends” European Microwave Conference 2012, which is incorporated herein by reference. Further, A. Margomenos, et al describe thermal management for power amplifiers in “X-Band Highly Efficient GaN Power Amplifier Utilizing Built-In Electroformed Heat Sinks for Advanced Thermal Management”, IEEE International Microwave Symposium 2013, which is incorporated herein by reference. The above A. Margomenos references present cooling packaging and interconnection methods for wide band gap devices. However, the interconnection methods rely on wire bonds or electroplated interconnects to connect the microelectronic chips to the packaging. These interconnection methods result in direct current (DC) and radio frequency (RF) losses, increased cost, and increased package volume over what is desirable. Additionally, the microelectronic chips, namely, GaN on SiC monolithic microwave integrated circuits (MMICs), require additional processing steps for packaging compatibility, such as processing steps for adding benzocyclobutene (BCB) layers. Such steps add high-frequency losses due to increased parasitic capacitances due to the dielectric constant of BCB. There is also increased cost due to an approximate 10% increase in processing time due to the added processing steps with BCB.
In addition, the heat spreader fabrication approach described by A. Margomenos, et al in “X-Band Highly Efficient GaN Power Amplifier Utilizing Built-In Electroformed Heat Sinks for Advanced Thermal Management”, IEEE International Microwave Symposium 2013 relies on sidewall electroplating followed by polishing. This can result in voids inside the heat spreaders when fabricating very compact packages, especially when the lateral dimensions of the heat spreaders are incrementally larger than the lateral dimensions of the chips to be embedded.
U.S. Published Patent Application 2007/0290326, filed Oct. 15, 2006, which is incorporated herein by reference, describes multi-dimensional wafer-level integrated antenna sensor micro packaging, and U.S. Pat. No. 7,067,397, issued Apr. 13, 2010, which is incorporated herein by reference, describes a method of fabricating high yield wafer level packages integrating MMIC and MEMS components. MMIC packaging using wafer scale assembly is described in “MMIC Packaging and Heterogeneous Integration Using Wafer-Scale Assembly”, Mantech conference, 2007, which is incorporated herein by reference. These references, while describing wafer level integration, do not address the integration of thermal heat spreaders.
U.S. Pat. No. 8,093,690, issued Jan. 10, 2012, which is incorporated herein by reference, is related to chip packaging with conductive interconnects and a shielding layer; however, this reference also does not address the integration of a heat spreader.
What is needed is a low-cost and manufacturable wafer-level packaging technology for low-loss and high-performance RF packages that combines advanced microelectronic chips, integrated thermal heat spreaders, hermetically-sealed cavities, and low-loss through-wafer interconnects. The embodiments of the present disclosure answer these and other needs.